FABulous.fabric_definition.Gen_IO

Generated I/O definition module.

This module contains the Gen_IO class which represents generated I/O ports for FPGA fabric tiles. These are automatically generated I/O interfaces that connect fabric internals to external pins.

Classes

class Gen_IO[source]

Store information about a generated IO port (GEN_IO).

The information are parsed from the GEN_IO definitions in the tile CSV file.

prefix[source]

The prefix of the GEN_IO given in the CSV file.

Type:

str

pins[source]

Number of IOs.

Type:

int

IO[source]

Direction of the IOs, either INPUT or OUTPUT, seen from the fabric side. This means a fabric INPUT is an OUTPUT globally and vice versa.

Type:

IO

configBit[source]

The number of accessible config bits for config access GEN_IO.

Type:

int

configAccess[source]

Whether the GEN_IO is config access. Routes access to config bits, directly to TOP. This GEN_IOs are not connected to the switchmatrix, Can only be used as an OUTPUT.

Type:

bool

inverted[source]

GEN_IO will be inverted.

Type:

bool

clocked[source]

Adds a register to GEN_IO.

Type:

bool

clockedComb[source]

Creates two signals for every GEN_IO. <prefix><Number>_Q: The clocked signal. <prefix><Number>: The original combinatorial signal. If the GEN_IO is an INPUT, then there will be created two signals to the top, <prefix><Number>_Q_top is the clocked input signal and <prefix><Number>_top is the combinatorial input signal. If the GEN_IO is an OUTPUT, then there will be two signals connected to the switch matrix, <prefix><Number>_Q is the clocked output signal and <prefix><Number> is the combinatorial output signal.

Type:

bool

clockedMux[source]

GEN_IO will be multiplexed between the combinatorial and clocked signal. The multiplexer can be switched via config bits.

Type:

bool